module SMEX2 
title 'Alternate Version of Example State Machine' 

" Input and output pins 
CLOCK, RESET_L, A, B            pin;
LASTA, Q1, Q2                   pin istype 'reg';
Z                               pin istype 'com';

" Definitions 
QSTATE  = [Q1,Q2];               " State variables 
INIT    = [ 0, 0];               " State encodings 
LOOKING = [ 0, 1]; 
OK      = [ 1, 0]; 
XTRA    = [ 1, 1];
RESET = !RESET_L;

state_diagram QSTATE

state INIT:    IF RESET THEN INIT ELSE LOOKING;

state LOOKING: IF RESET THEN INIT
               ELSE IF (A == LASTA) THEN OK
               ELSE LOOKING;

state OK:      IF RESET THEN INIT
               ELSE IF B THEN OK
               ELSE IF (A == LASTA) THEN OK
               ELSE LOOKING;

state XTRA:    GOTO INIT;

equations
LASTA.CLK = CLOCK; QSTATE.CLK = CLOCK; " QSTATE.OE = 1;

LASTA := A;
Z = (QSTATE == OK);

test_vectors
([RESET_L, CLOCK, A, B] -> [QSTATE , LASTA, Z])
 [   0   ,  .C. , 0, 0] -> [INIT   ,   0  , 0]; " Check -->INIT (RESET)
 [   0   ,  .C. , 1, 0] -> [INIT   ,   1  , 0]; "  and LASTA flip-flop
 [   1   ,  .C. , 0, 0] -> [LOOKING,   0  , 0]; " Come out of initialization
 [   0   ,  .C. , 0, 0] -> [INIT   ,   0  , 0]; " Check LOOKING-->INIT (RESET)
 [   1   ,  .C. , 0, 0] -> [LOOKING,   0  , 0]; " Come out of initialization
 [   1   ,  .C. , 1, 0] -> [LOOKING,   1  , 0]; " --> LOOKING since 0!=1
 [   1   ,  .C. , 1, 0] -> [OK     ,   1  , 1]; " --> OK since 1==1
 [   0   ,  .C. , 0, 0] -> [INIT   ,   0  , 0]; " Check OK-->INIT (RESET)
 [   1   ,  .C. , 0, 0] -> [LOOKING,   0  , 0]; " Go back towards OK ...
 [   1   ,  .C. , 0, 0] -> [OK     ,   0  , 1]; " --> OK since 0==0
 [   1   ,  .C. , 1, 1] -> [OK     ,   1  , 1]; " --> OK since B, even though 1!=0
 [   1   ,  .C. , 1, 0] -> [OK     ,   1  , 1]; " --> OK since 1==1
 [   1   ,  .C. , 0, 0] -> [LOOKING,   0  , 0]; " --> LOOKING since 0!=1
 
 
 


END SMEX2