"
"  File:	C:\FNDTN\ACTIVE\PROJECTS\CHAPTER7\TbirdSM1.abl
"  created:	02/02/99 09:59:38
"  from:	'C:\FNDTN\ACTIVE\PROJECTS\CHAPTER7\TbirdSM1.asf'
"  by:		fsm2hdl - version: 2.0.1.49
"
module tbirdsm1
Title 'tbirdsm1'

Declarations

"clocks
CLK PIN;

"input ports
HAZ PIN;
LEFT PIN;
RIGHT PIN;

"output ports
LA PIN;
LB PIN;
LC PIN;
RA PIN;
RB PIN;
RC PIN;

"******** SYMBOLIC state machine: LSTATE ******
LSTATE STATE_REGISTER;
IDLE, L1, L2, L3, LR3, R1, R2, R3 STATE;


Equations

"diagram ACTIONS

"************* state machine: LSTATE *************
" clock signals definitions
	LSTATE.clk = CLK;

State_diagram LSTATE


State IDLE:
    
     IF (RIGHT) THEN 
    R1
     ELSE  IF (HAZ) THEN 
        LR3
     ELSE  IF (!(LEFT # RIGHT # HAZ)) THEN 
            IDLE
     ELSE  IF (LEFT) THEN 
                L1;


State L1:
    
    LA = 1;
     IF (1) THEN 
    L2;


State L2:
    
    LA = 1;
    LB = 1;
     IF (1) THEN 
    L3;


State L3:
    
    LA = 1;
    LB = 1;
    LC = 1;
     IF (1) THEN 
    IDLE;


State LR3:
    
    LA = 1;
    LB = 1;
    LC = 1;
    RA = 1;
    RB = 1;
    RC = 1;
     IF (1) THEN 
    IDLE;


State R1:
    
    RA = 1;
     IF (1) THEN 
    R2;


State R2:
    
    RA = 1;
    RB = 1;
     IF (1) THEN 
    R3;


State R3:
    
    RA = 1;
    RB = 1;
    RC = 1;
     IF (1) THEN 
    IDLE;

" end of state machine - LSTATE


end tbirdsm1