module Z74x194 
title '4-bit Universal Shift Register' 
"Z74X194 device ’P16V8R’; 

" Input and output pins 
CLK, RIN, A, B, C, D, LIN              pin 1, 2, 3, 4, 5, 6, 7; 
S1, S0, CLR_L                          pin 8, 9, 12;
QA, QB, QC, QD                         pin 19, 18, 17, 16 istype 'reg';

" Active-level translation
CLR = !CLR_L;

" Set definitions 
INPUT   = [  A,  B,  C, D  ]; 
LEFTIN  = [ QB, QC, QD, LIN]; 
RIGHTIN = [RIN, QA, QB, QC ]; 
OUT     = [ QA, QB, QC, QD ];

CTRL  = [S1,S0]; 
HOLD  = (CTRL == [0,0]); 
RIGHT = (CTRL == [0,1]); 
LEFT  = (CTRL == [1,0]); 
LOAD  = (CTRL == [1,1]);

equations
OUT.CLK = CLK;

OUT := !CLR & ( 
           HOLD & OUT
         # RIGHT & RIGHTIN
         # LEFT & LEFTIN
         # LOAD & INPUT);

end Z74x194